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Commits
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df7b3aee6d | ||
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4e3525ffe2 |
@@ -135,6 +135,14 @@ module cpu21_board_top #(
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wire [15:0] sw_vec = {12'b0, sw_flag, irq_sw};
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// 中断连线:SW0 与鼠标共用一个入口,SW1 与"关卡入口"共用一个入口。
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wire [ 2:0] irq_vec = {irq_sw[2], (level_irq | irq_sw[1]), (mouse_irq | irq_sw[0])};
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// ---------------------------------------------------------------------------
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// 指令 ROM:组合读(未用到的地址填 NOP)
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// ---------------------------------------------------------------------------
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reg [31:0] rom [0:ROM_WORDS-1];
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integer i;
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initial begin
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for (i = 0; i < ROM_WORDS; i = i + 1)
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rom[i] = 32'h0000_0013; // NOP 填充
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`ifdef SAOLEI_ROM
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@@ -305,8 +313,7 @@ cpu21_vga u_vga (
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.vga_r (vga_r),
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.vga_g (vga_g),
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.vga_b (vga_b),
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Tcl 一键重建
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ga_hs (vga_hs),
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.vga_hs (vga_hs),
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.vga_vs (vga_vs),
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.frame_tick_o(frame_tick)
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);
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@@ -337,7 +344,8 @@ generate
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.ps2_clk_oe_o (),
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.ps2_data_i (ps2_data),
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.ps2_data_oe_o(),
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.ev_valid_o (ev_valid),
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Tcl 一键重建
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valid_o (ev_valid),
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.ev_dx_o (ev_dx),
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.ev_dy_o (ev_dy),
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.ev_btn_o (ev_btn),
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@@ -103,4 +103,3 @@ module cpu21_pointer #(
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endmodule
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`default_nettype wire
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Tcl 一键重建
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@@ -39,12 +39,12 @@ module cpu21_ps2_mouse (
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output reg [15:0] rx_count_o
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);
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// 开漏:oe = 1 时把线拉低,否则高阻(外部上拉)
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assign ps2_clk_oe_o = 1'b0; // 本设计只接收,不主动拉低时钟(除了初始化)
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assign ps2_data_oe_o = init_oe;
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。本模块只接收,两条线都不驱动。
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// 开漏:oe = 1 时把线拉低,否则高阻(外部上拉)。本模块只接收,两条线都不驱动。
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assign ps2_clk_oe_o = 1'b0;
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assign ps2_data_oe_o = 1'b02_data_s1, ps2_data_s2;
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assign ps2_data_oe_o = 1'b0;
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// 两级同步
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reg ps2_clk_s1, ps2_clk_s2, ps2_data_s1, ps2_data_s2;
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always @(posedge clk or posedge reset) begin
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if (reset) begin
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ps2_clk_s1 <= 1'b1;
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@@ -142,4 +142,3 @@ module cpu21_ps2_mouse (
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endmodule
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`default_nettype wire
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Tcl 一键重建
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@@ -239,4 +239,3 @@ module cpu21_vga #(
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endmodule
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`default_nettype wire
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Tcl 一键重建
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@@ -0,0 +1,77 @@
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# =============================================================================
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# check_rtl_text.ps1 —— detect stray non-Verilog text in the RTL sources.
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#
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# WHY: this project's .v files were twice corrupted by a text tool that inserted a
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# line of README prose into them ("Tcl ..." / a Chinese sentence), which made
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# Vivado fail with
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# ERROR: [Synth 8-2715] syntax error near "..." 'non-printable character 0xe4'
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# and produced a cascade of bogus errors in the included ROM .vh. Running this
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# script takes a second and catches it before spending a synthesis run.
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#
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# WHAT IT CHECKS
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# 1) a line inside .v/.vh/.xdc that has non-ASCII characters *outside* a comment
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# (i.e. real code position) -> corruption;
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# 2) a line that looks like pasted prose/markdown (leading "|", "**", or a line
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# that is bare text after `endmodule`).
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#
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# USAGE (from the repository root or from pipelined-cpu/):
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# powershell -ExecutionPolicy Bypass -File pipelined-cpu\tools\check_rtl_text.ps1
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# Exit code 0 = clean, 1 = found something.
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# =============================================================================
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$ErrorActionPreference = 'Stop'
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$srcs = Join-Path (Split-Path -Parent $PSScriptRoot) 'srcs'
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if (-not (Test-Path $srcs)) { Write-Output "ERROR: cannot find $srcs"; exit 2 }
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$bad = 0
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$files = Get-ChildItem -Recurse -Path $srcs -Include *.v, *.vh, *.xdc -File
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foreach ($f in $files) {
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$rel = $f.FullName.Substring($srcs.Length).TrimStart('\', '/')
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$lines = @(Get-Content -LiteralPath $f.FullName)
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$inBlockComment = $false
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for ($i = 0; $i -lt $lines.Count; $i++) {
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$line = $lines[$i]
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$lineNo = $i + 1
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# ---- strip comments so we only look at code positions ----
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$code = $line
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if ($f.Extension -eq '.xdc') {
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$h = $code.IndexOf('#'); if ($h -ge 0) { $code = $code.Substring(0, $h) }
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}
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else {
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$c = $code.IndexOf('//'); if ($c -ge 0) { $code = $code.Substring(0, $c) }
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if ($inBlockComment) { $code = '' }
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if ($line -match '/\*') { $inBlockComment = $true }
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if ($line -match '\*/') { $inBlockComment = $false }
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}
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$trim = $line.Trim()
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# ---- check 1: non-ASCII in code position ----
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if ($code -match '[^\x00-\x7F]') {
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Write-Output ("!! $rel`:$lineNo non-ASCII text in code position:")
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Write-Output (" " + $trim)
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$bad++
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continue
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}
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# ---- check 2: pasted prose / markdown leftovers ----
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if ($trim -match '^\||^\*\*|^#[^0-9#]' -and $f.Extension -ne '.xdc') {
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Write-Output ("!! $rel`:$lineNo looks like pasted prose:")
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Write-Output (" " + $trim)
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$bad++
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}
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}
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}
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Write-Output ""
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Write-Output ("scanned " + $files.Count + " files under srcs/")
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if ($bad -eq 0) {
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Write-Output "RTL text check: OK (no stray non-Verilog text found)."
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exit 0
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}
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Write-Output ("RTL text check: FAILED, " + $bad + " suspicious line(s) - fix them before synthesis.")
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Write-Output "Hint: such lines are usually injected by an editor/tool; remove them, then re-run this script."
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exit 1
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