新增 ISA 验证资产：迷你汇编器 + 指令测试程序
tools/rv_asm.py - 极简 RISC-V 汇编器（Python 3，无第三方依赖），支持 add/sub/and/or/xor/sll/srl/sra/slt/sltu、mul/mulh/mulhsu/mulhu、 addi/slti/sltiu/xori/ori/andi、slli/srli/srai、lw/sw、 beq/bne/blt/bge/bltu/bgeu、lui、jal/jalr、ecall、标签与 # 注释； - 提供 print / halt 两条双字伪指令（分别等价于 addi a7,zero,34 + ecall、 addi a7,zero,10 + ecall）； - I 型与访存立即数做 12 位有符号范围检查，越界直接报错，避免静默截断； - 除 hex 外同时输出 .lst 编码清单，便于与 .asm 逐行核对。 testbench/programs/isa_test.asm + isa_test.expected - 指令扩展验证程序：sltiu（两个方向）、xor/sll/srl/sra、mul/mulh/mulhu/mulhsu、 bltu/bge/bgeu 的有符号与无符号区分，以及 bge/bgeu/bltu 三个循环， 共 24 项 LED 输出，期望值逐行保存在 isa_test.expected。 testbench/programs/lui_test.asm - LUI 验证程序：0x12345 / 0xfffff / 0x80000 与 lui+addi 组合，共 4 项输出。 另外包含编辑器/格式化工具对 cpu21_riscv_alu.v、cpu21_riscv_branch_unit.v、 cpu21_riscv_decoder.v 的重排（纯格式，语义等价）。 验证（xsim + testbench/tb_no_intr.v，按提交后的正式路径生成 hex） - isa_test：24 项 LED 输出与 isa_test.expected 逐项一致，143 周期后 halt 停机； - lui_test：12345000 / fffff000 / 80000000 / 12345678，21 周期后停机； - 重新编译无 error / warning。
This commit is contained in:
+4
-2
@@ -57,8 +57,10 @@ module cpu21_riscv_alu (
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ALU_AND: result = a & b;
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ALU_OR: result = a | b;
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ALU_XOR: result = a ^ b;
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ALU_NOR: result = ~(a | b); ALU_MULH: result = mult_ss[63:32];
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ALU_MULHSU: result = mult_su[63:32]; ALU_SLT: result = ($signed(a) < $signed(b)) ? 32'd1 : 32'd0;
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ALU_NOR: result = ~(a | b);
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ALU_MULH: result = mult_ss[63:32];
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ALU_MULHSU: result = mult_su[63:32];
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ALU_SLT: result = ($signed(a) < $signed(b)) ? 32'd1 : 32'd0;
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ALU_SLTU: result = (a < b) ? 32'd1 : 32'd0;
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ALU_PASSB: result = b;
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default: result = 32'b0;
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@@ -213,8 +213,7 @@ module cpu21_riscv_decoder (
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bgeu_o = (funct3 == 3'b111);
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// 有符号比较用 ALU_SLT、无符号比较用 ALU_SLTU，相等/不等用减法；
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// 分支是否成立由 EX 级的分支裁决单元决定，这里只与真值表保持一致。
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alu_op_o = (blt_o || bge_o) ? ALU_SLT :
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((bltu_o || bgeu_o) ? ALU_SLTU : ALU_SUB);
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alu_op_o = (blt_o || bge_o) ? ALU_SLT : ((bltu_o || bgeu_o) ? ALU_SLTU : ALU_SUB);
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imm_o = {{19{ir_i[31]}}, ir_i[31], ir_i[7], ir_i[30:25], ir_i[11:8], 1'b0};
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end
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end
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@@ -28,7 +28,7 @@
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因此它与标准 RISC-V 指令的低 7 位 opcode 相差右移两位。
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| 指令类别 | opcode | 说明 |
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| ------------------------------ | -----: | --------------------------------------- |
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| ----------------------------------------------- | -----: | ---------------------------------------------------------------------------- |
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| R 型 | `0x0c` | add/sub/and/or/xor/slt/sltu/sll/srl/sra |
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| M 扩展（R 型） | `0x0c` | `funct7=0000001`：mul/mulh/mulhsu/mulhu（另有课程约定的 remu，`funct3=111`） |
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| I 型 ALU | `0x04` | addi/andi/ori/xori/slti/sltiu/slli/srli/srai |
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@@ -0,0 +1,109 @@
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# 指令扩展验证程序：每条被测指令的结果都通过 ecall(a7=34) 输出，最后用 halt 停机。
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# 期望输出顺序见每行注释（共 24 次输出），同时保存在同目录 isa_test.expected（每行一项 LED 值）。
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#
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# 用法（在仓库根目录执行）：
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# python tools/rv_asm.py testbench/programs/isa_test.asm <仿真工作目录>/risc-v-benchmark_ccab.hex
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# 再用 testbench/tb_no_intr.v 仿真；hex 命名为 risc-v-benchmark_ccab.hex 时会被测试
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# 平台优先从仿真工作目录载入（参见 tb_no_intr.v 的 ROM 探测顺序）。
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# print / halt 是 tools/rv_asm.py 提供的双字伪指令：
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# print = addi a7,zero,34 + ecall；halt = addi a7,zero,10 + ecall。
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# ---- sltiu：立即数符号扩展后做无符号比较 ----
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addi t0, zero, 1
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addi t1, zero, -1 # t1 = 0xffffffff
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sltiu a0, t0, -1 # 1 <u 0xffffffff -> 00000001
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print
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sltiu a0, t1, 1 # 0xffffffff <u 1 -> 00000000
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print
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# ---- xor / sll / srl / sra（原有指令回归）----
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addi t0, zero, 0xff
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addi t1, zero, -1
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xor a0, t0, t1 # 0xff ^ 0xffffffff -> ffffff00
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print
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addi t0, zero, 1
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addi t1, zero, 31
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sll a0, t0, t1 # 1 << 31 -> 80000000
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print
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addi t0, zero, -1
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addi t1, zero, 28
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srl a0, t0, t1 # 逻辑右移 -> 0000000f
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print
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sra a0, t0, t1 # 算术右移 -> ffffffff
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print
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# ---- mul：无符号乘积低 32 位 ----
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addi t0, zero, 1234
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addi t1, zero, 567
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mul a0, t0, t1 # 1234*567 = 0x000aad1e
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print
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# ---- mulh / mulhu / mulhsu：64 位乘积的高 32 位 ----
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addi t0, zero, -1 # 有符号 -1 / 无符号 0xffffffff
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addi t1, zero, -1
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mulh a0, t0, t1 # (-1)*(-1)=1 -> 00000000
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print
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mulhu a0, t0, t1 # 0xffffffff^2 -> fffffffe
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print
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addi t0, zero, -1
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addi t1, zero, 2
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mulhsu a0, t0, t1 # (-1)*2=-2 -> ffffffff
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print
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# ---- bltu：0 <u 0xffffffff 成立（按有符号比较则不成立）----
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addi t0, zero, -1
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bltu zero, t0, bltu_ok
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addi a0, zero, 0x101 # 不应执行
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print
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bltu_ok:
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addi a0, zero, 0x601 # 00000601
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print
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# ---- bge：有符号 >= ，(-1) >= 0 不成立，应走 fall-through ----
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addi t0, zero, -1
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bge t0, zero, bge_bad
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addi a0, zero, 0x602 # 00000602
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print
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jal zero, bge_done
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bge_bad:
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addi a0, zero, 0x102 # 不应执行
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print
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bge_done:
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# ---- bgeu：无符号 >= ，0xffffffff >=u 0 成立 ----
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addi t0, zero, -1
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bgeu t0, zero, bgeu_ok
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addi a0, zero, 0x103 # 不应执行
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print
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bgeu_ok:
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addi a0, zero, 0x603 # 00000603
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print
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# ---- bge 循环：从 -3 递增到 0（共 4 次输出）----
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addi s1, zero, -3
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bge_loop:
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add a0, zero, s1
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print # fffffffd / fffffffe / ffffffff / 00000000
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addi s1, s1, 1
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bge zero, s1, bge_loop
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# ---- bgeu 循环：3 -> 1（共 3 次输出）----
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addi t0, zero, 3
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bgeu_loop:
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add a0, zero, t0
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print # 00000003 / 00000002 / 00000001
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addi t0, t0, -1
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addi t2, zero, 1
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bgeu t0, t2, bgeu_loop
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# ---- bltu 循环：4 -> 1（共 4 次输出）----
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addi s1, zero, 4
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bltu_loop:
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add a0, zero, s1
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print # 00000004 / 00000003 / 00000002 / 00000001
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addi s1, s1, -1
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bltu zero, s1, bltu_loop
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halt
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@@ -0,0 +1,24 @@
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00000001
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00000000
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ffffff00
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80000000
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0000000f
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ffffffff
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000aad1e
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00000000
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fffffffe
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ffffffff
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00000601
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00000602
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00000603
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fffffffd
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fffffffe
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ffffffff
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00000000
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00000003
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00000002
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00000001
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00000004
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00000003
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00000002
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00000001
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@@ -0,0 +1,26 @@
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# LUI 指令测试：依次打印 lui 的结果，最后停机。
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# 期望输出：12345000 / fffff000 / 80000000 / 12345678，随后停机（halted=1）。
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# 用法：python tools/rv_asm.py testbench/programs/lui_test.asm <仿真工作目录>/risc-v-benchmark_ccab.hex
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lui t0, 0x12345 # t0 = 0x12345000
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add a0, zero, t0
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addi a7, zero, 34
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ecall
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lui t0, 0xfffff # t0 = 0xfffff000
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add a0, zero, t0
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addi a7, zero, 34
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ecall
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lui t0, 0x80000 # t0 = 0x80000000
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add a0, zero, t0
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addi a7, zero, 34
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ecall
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lui t0, 0x12345 # 常见用法 lui+addi：0x12345678
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addi t0, t0, 0x678
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add a0, zero, t0
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addi a7, zero, 34
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ecall
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addi a7, zero, 10 # a7=10 -> 停机
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ecall
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+220
@@ -0,0 +1,220 @@
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#!/usr/bin/env python3
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"""极简 RISC-V 汇编器：仅支持本项目测试所需的指令子集。
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用法: python tools/rv_asm.py <input.asm> <output.hex>
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同时生成 <output.hex>.lst 反汇编/编码清单，便于核对。
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支持：add/sub/and/or/xor/sll/srl/sra/slt/sltu、
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mul/mulh/mulhsu/mulhu、
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addi/slti/sltiu/xori/ori/andi、slli/srli/srai、
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lw/sw、beq/bne/blt/bge/bltu/bgeu、lui、jal/jalr、ecall、标签、# 注释
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伪指令：print（= addi a7,zero,34 + ecall）、halt（= addi a7,zero,10 + ecall），各占两个字。
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示例：python tools/rv_asm.py testbench/programs/isa_test.asm out.hex
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"""
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import re
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import sys
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REGS = {
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"zero": 0,
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"ra": 1,
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"sp": 2,
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"gp": 3,
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"tp": 4,
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"t0": 5,
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"t1": 6,
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"t2": 7,
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"s0": 8,
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"s1": 9,
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"a0": 10,
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"a1": 11,
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"a2": 12,
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"a3": 13,
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"a4": 14,
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"a5": 15,
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"a6": 16,
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"a7": 17,
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"s2": 18,
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"s3": 19,
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"s4": 20,
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"s5": 21,
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"s6": 22,
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"s7": 23,
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"s8": 24,
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"s9": 25,
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"s10": 26,
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"s11": 27,
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"t3": 28,
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"t4": 29,
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"t5": 30,
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"t6": 31,
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}
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def reg(t):
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t = t.strip()
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if t in REGS:
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return REGS[t]
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m = re.fullmatch(r"x(\d+)", t)
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if m:
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return int(m.group(1))
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raise SystemExit("未知寄存器: " + t)
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def num(t):
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return int(t.strip(), 0)
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def enc_r(f7, rs2, rs1, f3, rd):
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return (f7 << 25) | (rs2 << 20) | (rs1 << 15) | (f3 << 12) | (rd << 7) | 0x33
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def enc_i(imm, rs1, f3, rd, op=0x13):
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return ((imm & 0xFFF) << 20) | (rs1 << 15) | (f3 << 12) | (rd << 7) | op
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def enc_s(imm, rs2, rs1, f3):
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imm &= 0xFFF
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return (
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((imm >> 5) << 25)
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| (rs2 << 20)
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| (rs1 << 15)
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| (f3 << 12)
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| ((imm & 0x1F) << 7)
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| 0x23
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)
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def enc_b(imm, rs2, rs1, f3):
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imm &= 0x1FFF
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return (
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(((imm >> 12) & 1) << 31)
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| (((imm >> 5) & 0x3F) << 25)
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| (rs2 << 20)
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| (rs1 << 15)
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| (f3 << 12)
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| (((imm >> 1) & 0xF) << 8)
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| (((imm >> 11) & 1) << 7)
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| 0x63
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)
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def enc_u(imm, rd):
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return ((imm & 0xFFFFF) << 12) | (rd << 7) | 0x37
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def enc_j(imm, rd):
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imm &= 0x1FFFFF
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return (
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(((imm >> 20) & 1) << 31)
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| (((imm >> 1) & 0x3FF) << 21)
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| (((imm >> 11) & 1) << 20)
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| (((imm >> 12) & 0xFF) << 12)
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| (rd << 7)
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| 0x6F
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)
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RTYPE = {
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"add": (0x00, 0),
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"sub": (0x20, 0),
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"sll": (0x00, 1),
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"slt": (0x00, 2),
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"sltu": (0x00, 3),
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"xor": (0x00, 4),
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"srl": (0x00, 5),
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"sra": (0x20, 5),
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"or": (0x00, 6),
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"and": (0x00, 7),
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"mul": (0x01, 0),
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"mulh": (0x01, 1),
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"mulhsu": (0x01, 2),
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"mulhu": (0x01, 3),
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}
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ITYPE = {"addi": 0, "slti": 2, "sltiu": 3, "xori": 4, "ori": 6, "andi": 7}
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SHIFT = {"slli": 1, "srli": 5, "srai": 5}
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BTYPE = {"beq": 0, "bne": 1, "blt": 4, "bge": 5, "bltu": 6, "bgeu": 7}
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# 双字伪指令：print = addi a7,zero,34 + ecall；halt = addi a7,zero,10 + ecall
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PSEUDO_SIZE = {"print": 2, "halt": 2}
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def assemble(lines):
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labels, items, addr = {}, [], 0
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for raw in lines:
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line = raw.split("#")[0].strip()
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if not line:
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continue
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while True:
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m = re.match(r"^([A-Za-z_.$][\w.$]*)\s*:\s*(.*)$", line)
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if not m:
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break
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labels[m.group(1)] = addr
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line = m.group(2).strip()
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if not line:
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break
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if not line:
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continue
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items.append((addr, line))
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addr += 4 * PSEUDO_SIZE.get(line.split()[0].lower(), 1)
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out = []
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for addr, line in items:
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parts = re.split(r"[\s,]+", line)
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mn, a = parts[0].lower(), parts[1:]
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if mn in RTYPE:
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f7, f3 = RTYPE[mn]
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w = enc_r(f7, reg(a[2]), reg(a[1]), f3, reg(a[0]))
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elif mn in ITYPE:
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im = num(a[2])
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if not (-2048 <= im <= 2047):
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raise SystemExit("I 型立即数超出 12 位有符号范围: " + line)
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w = enc_i(im, reg(a[1]), ITYPE[mn], reg(a[0]))
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elif mn in SHIFT:
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w = enc_i(num(a[2]) & 0x1F, reg(a[1]), SHIFT[mn], reg(a[0]))
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elif mn == "lui":
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w = enc_u(num(a[1]), reg(a[0]))
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elif mn in ("lw", "sw"):
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m = re.fullmatch(r"(-?\w+)\((\w+)\)", a[1])
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if not m:
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raise SystemExit("内存操作数格式应为 imm(rs1): " + line)
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im = num(m.group(1))
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if not (-2048 <= im <= 2047):
|
||||
raise SystemExit("访存偏移超出 12 位有符号范围: " + line)
|
||||
if mn == "lw":
|
||||
w = enc_i(im, reg(m.group(2)), 2, reg(a[0]), 0x03)
|
||||
else:
|
||||
w = enc_s(im, reg(a[0]), reg(m.group(2)), 2)
|
||||
elif mn in BTYPE:
|
||||
tgt = labels[a[2]] if a[2] in labels else num(a[2])
|
||||
w = enc_b(tgt - addr, reg(a[1]), reg(a[0]), BTYPE[mn])
|
||||
elif mn == "jal":
|
||||
tgt = labels[a[1]] if a[1] in labels else num(a[1])
|
||||
w = enc_j(tgt - addr, reg(a[0]))
|
||||
elif mn == "jalr":
|
||||
w = enc_i(num(a[2]), reg(a[1]), 0, reg(a[0]), 0x67)
|
||||
elif mn == "ecall":
|
||||
w = 0x00000073
|
||||
elif mn == "print":
|
||||
w = [enc_i(34, 0, 0, 17), 0x00000073]
|
||||
elif mn == "halt":
|
||||
w = [enc_i(10, 0, 0, 17), 0x00000073]
|
||||
else:
|
||||
raise SystemExit("未知助记符: " + mn)
|
||||
out.append((addr, line, w if isinstance(w, list) else [w]))
|
||||
return out
|
||||
|
||||
|
||||
def main():
|
||||
src, dst = sys.argv[1], sys.argv[2]
|
||||
with open(src, encoding="utf-8") as f:
|
||||
prog = assemble(f.readlines())
|
||||
with open(dst, "w", encoding="ascii") as f:
|
||||
for _, _, ws in prog:
|
||||
for w in ws:
|
||||
f.write("%08X\n" % w)
|
||||
with open(dst + ".lst", "w", encoding="utf-8") as f:
|
||||
for addr, line, ws in prog:
|
||||
f.write("%04X: %s %s\n" % (addr, " ".join("%08X" % w for w in ws), line))
|
||||
print("已生成 %s（%d 个字）" % (dst, sum(len(ws) for _, _, ws in prog)))
|
||||
|
||||
|
||||
main()
|
||||
Reference in New Issue
Block a user